The Official Blog of Chris Zeh

Adventures in Electrical Engineering, Physical Computing, Programming and Web Development


BetterSnipper has Launched! A modern screenshot utility

For the last year I've been working on this little software side-project. I set out to solve the problem of taking screenshots and being able to use them quickly and easily. There are a lot of alternative screenshot tools out on the market, most are good at taking screenshots but almost all of them fail [...]

June 21st, 2015|MetaBlogging|0 Comments

Intel® Edison Breakout Board – Getting Started Tips

This weekend I had some time to dive into my new Intel Edison, with companion Breakout Board. There are already a lot of good resources online for getting started with the Edison, but I wanted to share the problems I ran into while starting working with the two boards. The first step I recommend is [...]

January 18th, 2015|Edison|0 Comments

Virtual Com Port Connection to DE0-Nano – vj-uart

Reader Paul Green was inspired by one of my blog posts, and has done an amazing job of taking it to the next level. The vj-uart project allows communication to the DE0-Nano using a virtual com port connection. This tutorial will explain how to pull the files down from GitHub, and how to start talking [...]

July 12th, 2014|DE0-Nano|21 Comments

Website redesign is up and running

The blog has a new look! The original design was over 4 years old and was starting to look a little dated. It just felt like time to make a change. I still have plenty of things I need to tweak with the new look, but it's ready to be pushed out. If I wait [...]

June 7th, 2014|MetaBlogging|0 Comments

Crossed the 50K All Time Views Milestone this week!

This week the idle-logic blog crossed the 50K all time views mark: From people all over the world: It's a humble number, but a satisfying milestone to cross. New Blog Feature I've been remiss to add new blog posts because I didn't want to bury the particularly popular posts currently on the front page. In [...]

April 5th, 2014|MetaBlogging|2 Comments

Updated b2vFixer.tcl for Quartus / Modelsim

I created a small improvement to my Quartus b2vFixer.tcl script. You can find the original post describing the purpose of this script here. In summary, this script is used to convert a top-level Quartus BDF (Block Design File) to a Verilog file usable in ModelSim. The only real change in this update is to allow [...]

September 21st, 2013|Altera, ModelSim, Quartus, Tcl|0 Comments