Mercurial Source Control for Quartus Projects
In order to better manage my development of Quartus HDL projects I decided to start using source control software. This allows me to easily see the changes I've made through the use of diff tools [...]
TCL Macro for Top-Level Schematic to Verilog Conversion (For ModelSim Simulation)
A new version of this script has been created: Updated b2vFixer.tcl for Quartus / Modelsim Quick Summary:I created a handy script (b2vFixer.tcl) that prepares a Quartus project with a Schematic (BDF) top-level entity for use [...]
One of Python’s Hidden Secrets – The Lone Underscore
I've been programming with Python for the last 4 years at my day job, and I've only seen this feature shown once in example code. To be honest, this is not something that you would [...]
Simulating the Virtual JTAG in ModelSim
Here I'm going to demonstrate how to use ModelSim to test out the Virtual JTAG design that I showed in my previous post. If you're new to ModelSim with Quartus II, I recommend you look [...]
Talking to the DE0-Nano using the Virtual JTAG interface.
How to communicate between a PC and a design running on the DE0-Nano using the Virtual JTAG Megafunction, a Tcl TCP/IP Server running in quartus_stp with virtually any programming language. *07/05/14 - Reader Paul Green [...]
Using ModelSim with Quartus II and the DE0-Nano
This is a tutorial to walk you through how to use Quartus II and ModelSim software together to create and analyze a simple design (an inverter), then we'll compare the RTL and Gate-Level simulations with [...]
